Search results for "Readout electronics"
showing 8 items of 8 documents
The sROD demonstrator for the ATLAS Tile Calorimeter Upgrade
2012
This work presents the early design of the super Read-Out Driver (sROD) demonstrator board for the Tile Calorimeter Demonstrator project. This project aims to test the new readout electronics architecture for the Phase 2 Upgrade of the ATLAS Tile Calorimeter, replacing the front-end electronics of one complete drawer with the new electronics during the Long Shutdown 2013, in order to evaluate its performance. The sROD demonstrator board will receive and process data from 48 channels. Moreover the sROD demonstrator board will send preprocessed data to the present trigger system, and will transmit trigger control and timing information (TTC) and Detector Control System (DCS) commands to the f…
Large area strip edgeless detectors fabricated by plasma etching process
2007
This work presents the last results from large area edgeless detector, fabricated by Plasma Etching Process to reduce the conventional width of the terminating structure of position sensitive detectors to the detector rim.. A current terminating ring is used to decouple the electrical behavior of the surface from the sensitive volume within a few tens of micrometers. The detectors have been illuminated using an infrared laser and their surface scanned in order to understand their collection behavior at the cut edge. The detectors have very high efficiency up to the insensitive area which is located about 60 mum from the detector edge.
The upgrade of the ALICE TPC with GEMs and continuous readout
2020
Journal of Instrumentation 16(03), P03022 (2021). doi:10.1088/1748-0221/16/03/P03022
The fast readout system for the MAPMTs of COMPASS RICH-1
2007
A fast readout system for the upgrade of the COMPASS RICH detector has been developed and successfully used for data taking in 2006 and 2007. The new readout system for the multi-anode PMTs in the central part of the photon detector of the RICH is based on the high-sensitivity MAD4 preamplifier-discriminator and the dead-time free F1-TDC chip characterized by high-resolution. The readout electronics has been designed taking into account the high photon flux in the central part of the detector and the requirement to run at high trigger rates of up to 100 kHz with negligible dead-time. The system is designed as a very compact setup and is mounted directly behind the multi-anode photomultiplie…
A low-noise and fast pre-amplifier and readout system for SiPMs
2015
Abstract To operate silicon photomultipliers (SiPMs) in a demanding environment with large temperature gradients, different amplifier concepts were characterized by analyzing SiPM pulse-shapes and charge distributions. A fully differential 4-wire SiPM pre-amplifier with separated tracks for the bias voltage and with good common-mode noise suppression was developed and successfully tested. To achieve highest single-pixel resolutions an online after-pulse and pile-up suppression was realized with fast readout electronics based on digital filters.
MuPix8 — Large area monolithic HVCMOS pixel detector for the Mu3e experiment
2019
Abstract The requirements of the ultra thin pixel detectors for the Mu3e experiment at PSI can be achieved by the HVCMOS technology, which allows the design of fast monolithic detectors. The latest nearly full size prototype, MuPix8, has a size of about 1 × 2 cm 2 . The pixel readout circuitry was fully redesigned in comparison to the previous MuPix versions. MuPix8’s readout electronics implement a new concept with two comparators and two different operation modes. One mode uses two threshold voltages for time walk correction, the other is a ramp-ADC. First tests show a detection efficiency of 99.6% for 4 GeV electrons.
An upgraded ATLAS central trigger for 2015 luminosities
2013
The Central Trigger Processor (CTP) is a core unit of the first of three levels that constitute the ATLAS trigger system. Based on information from calorimeter and muon trigger processors as well as from some additional systems it produces the level-1 trigger decision and prompts the read-out of the sub-detectors. The increase in luminosity at the LHC has pushed the CTP operation to its design limits. In order to still satisfy the physics goals of the experiment after the shutdown of the LHC of 2013/2014 the CTP will be upgraded during this period. This article discusses the current Central Trigger Processor, the motivation for the upgrade, and the changes foreseen to meet the requirements …
Synchronization of the distributed readout frontend electronics of the Baby MIND detector
2017
Baby MIND is a new downstream muon range detector for the WGASCI experiment. This article discusses the distributed readout system and its timing requirements. The paper presents the design of the synchronization subsystem and the results of its test.